View HMD1M32M2EG_518742.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

HANBit
HMD1M32M2EG
4Mbyte(1Mx32) EDO Mode, 1K Refresh, 72Pin SIMM, 5V Design Part No. HMD1M32M2EG
DESCRIPTION
The HMD1M32M2EG is an 1M x 32 bits Dynamic RAM MODULE which is assembled 2 pieces of 1M x 16bit DRAMs in 42 pin SOJ package on single sides the printed circuit board with decoupling capacitors. The HMD1M32M2EG is optimized for application to the systems, which are required high density and large capacity such as main memory of the computers and an image memory systems, and to the others, which are, requested compact size. The HMD1M32M2G provides common data and outputs.
Features
w Part Indentification HMD1M32M2EG - Gold plate Lead w 72 pins Single In-Line Package w EDO Mode Capability w Single +5V 0.5V power supply w Fast Access Time & Cycle Time TRAC HMD1M32M2EG-45 HMD1M32M2EG-50 HMD1M32M2EG-60 w Low Power Active: 1,870/1,650/1,430 mW(MAX) Standby: 11mW(CMOS level : MAX) w /RAS Only Refresh, /CAS before /RAS Refresh, Hidden Refresh Capability w All inputs and outputs TTL Compatible w 1,024 Refresh Cycles/16ms 45 50 60 tCAC 13 15 17 tRC 69 84 104 tHPC 16 20 25 PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 FUNCTION Address Inputs Data Input/Output Row Address Strobe Column Address Strobe Read/Write Enable
PIN ASSIGNMENT
SYMBOL Vss DQ0 DQ16 DQ1 DQ17 DQ2 DQ18 DQ3 DQ19 Vcc NC A0 A1 A2 A3 A4 A5 A6 NC DQ4 DQ20 DQ5 DQ21 DQ6 PIN PD1 - PD4 Vcc Vss NC PIN 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 SYMBOL DQ22 DQ7 DQ23 A7 NC Vcc A8 A9 NC /RAS2 NC NC NC NC Vss /CAS0 /CAS2 /CAS3 /CAS1 /RAS0 NC NC /WE NC PIN 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 FUNCTION Presence Detect Power (+5V) Ground No Connection HANBiT Electronics Co., Ltd.
SYMBOL DQ8 DQ24 DQ9 DQ25 DQ10 DQ26 DQ11 DQ27 DQ12 DQ28 Vcc DQ29 DQ13 DQ30 DQ14 DQ31 DQ15 NC PD1 PD2 PD3 PD4 NC Vss
PIN DESCRIPTION
Pin A0 - A9 DQ0 - DQ31 /RAS0, /RAS2 /CAS0 - /CAS3 /WE
URL:www.hbe.co.kr REV. 1.0 (August. 2002)
-1-
HANBit
HMD1M32M2EG
FUNCTIONAL BLOCK DIAGRAM
U0
/RAS0 /RAS
/CAS0
/LCAS
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15
DQ0-DQ7
/CAS1
/UCAS
/OE
DQ8-DQ15
/WE
A0-A9
U1
/RAS2 /RAS
/CAS2
/LCAS
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15
DQ16-DQ23
/CAS3
/UCAS
/OE
DQ24-DQ31
/WE /WE A0-A9
A0-A9
Vcc Vss
0.22uF Capacitor C0 - C1
U0-U1 U0-U1 1Mx16 DRAM U0-U1
URL:www.hbe.co.kr REV. 1.0 (August. 2002)
-2-
HANBiT Electronics Co., Ltd.
HANBit
ABSOLUTE MAXIMUM RATINGS*
SYMBOL TA TSTG VIN/VOUT VCC IOUT PD PARAMETER Ambient Temperature under Bias Storage Temperature (Plastic) Voltage on any Pin Relative to Vss Power Supply Voltage Short Circuit Output Current Power Dissipation RATING 0 ~ 70 -55 ~ 125 -1.0 ~ 7.0 -1.0 ~ 7.0 50 2
HMD1M32M2EG
UNIT C C V V mA W
*NOTE: 1. Stress greater than above absolute Maximum Ratings? May cause permanent damage to the device.
RECOMMENDED DC OPERATING CONDITIONS (TA = 0 ~ 70C)
PARAMETER Supply Voltage Ground Input High Voltage Input Low Voltage *NOTE: All voltages referenced to Vcc SYMBOL Vcc Vss VIH VIL MIN 4.5 0 2.4 -1.0 TYP. 5.0 0 MAX 5.5 0 Vcc+1 0.8 UNIT V V V V
DC AND OPERATING CHARACTERISTICS
SYMBOL Output Level VOH Output High Level Voltage (IOUT = -5mA) Output Level VOL Output Low Level Voltage (IOUT = 4.2mA) Operating Current ICC1 Average Power Supply Operating Current (/RAS,/CAS,Address Cycling : tRC = tRC min) Standby Current (TTL) ICC2 Power Supply Standby Current (/RAS,/CAS = VIH) /RAS Only Refresh Current ICC3 Average Power Supply Current mA /RAS Only Mode (/RAS Cycling, /CAS = VIH,: tRC = tRC min) ICC EDO Mode Current Average Power Supply Current ICC4 EDO Mode 60ns 340 mA 1,3 70ns 300 2 60ns 340 4 mA 60ns 70ns 340 300 mA 1,2 0 0.4 V 2.4 Vcc V PARAMETER MIN MAX UNIT NOTE
URL:www.hbe.co.kr REV. 1.0 (August. 2002)
-3-
HANBiT Electronics Co., Ltd.
HANBit
(/RAS = VIL, /CAS, Address Cycling : tPC = tPC min) Standby Current (CMOS) ICC5 Power Supply Standby Current (/RAS,/CAS >= Vcc - 0.2V) /CAS before /RAS Refresh Current ICC6 (tRC = tRC min) 60ns 70ns 70ns -
HMD1M32M2EG
300 mA 1,3
2
mA
340 300 mA
Standby Current /RAS = VIH ICC7 /CAS = VIL DOUT = Enable Input Leakage Current II(L) Any Input (0V<=VIN<=7V) All Other Pins Not Under Test = 0V Output Leakage Current IO(L) (DOUT is Disabled, 0V<=VOUT<=7V) Note: 1.Icc depends on output load condition when the device is selected. Icc (max) is specified at the output open condition. 2. Address can be changed once or less while /RAS = VIL. 3. Address can be changed once or less while /CAS = VIH
o
-
10
mA
1
-10
10
uA
-10
10
uA
CAPACITANCE
( TA=25 C, Vcc = 5V+/- 10%, f = 1Mhz ) SYMBOL CI1 C I2 CI3 CI4 CDQ1 MIN MAX 35 34 27 27 20 UNITS pF pF pF pF pF NOTE 1 1,2 1,2 1,2 1,2
DESCRIPTION Input Capacitance (A0-A9) Input Capacitance (/WE) Input Capacitance (/RAS0,/RAS2) Input Capacitance (/CAS0-/CAS3) Input/Output Capacitance (DQ0-31)
Note: 1. Capacitance measured with Boonton Meter or effective capacitance measuring method. 2. /CAS = VIH to disable DOUT.
AC CHARACTERISTICS
( 0 C TA 70oC , Vcc = 5V10%, See notes 1,15.)
o
The GMM731000CNS/SG writes data only in early write cycle (twcs>=twcs(min)) Delayed write cycle is not available because of I/O common.
URL:www.hbe.co.kr REV. 1.0 (August. 2002)
-4-
HANBiT Electronics Co., Ltd.
HANBit
READ, WRITE AND REFRESH CYCLE (Common Parameters) HMD1M32M2G-6 SYMBOL tRC tPR tRAS tCAS tASR tRAH tASC tcah tRCD tRAD tRSH tCSH tCRP tT tREF PARAMETER MIN Random Read or Write Cycle Time /RAS Precharge Time /RAS Pulse Width /CAS Pulse Width Row Address Setup Time Row Address Hold Time Column Address Setup Time Column Address Hold Time /RAS to /CAS Delay Time /RAS to Column Address Delay Time /RAS Hold Time /CAS Hold Time /CAS to /RAS Precharge Time Transition Time (Rise and Fall) Refresh Period (1024 Cycle) 110 40 60 15 0 10 0 10 20 15 15 60 5 3 MAX 10K 10K 45 30 50 16 MIN 130 50 70 18 0 10 0 15 20 15 18 70 5 3 -
HMD1M32M2EG
HMD1M32M2G-7 UNIT MAX 10K 10K 52 35 50 16 ns ns ns ns ns ns ns ns ns ns ns ns ns ns ms 8 9 10 NOTE
Read Cycle HMD1M32M2G-6 SYMBOL tRAC tCAC tAA tRCS tRCH tRRH tRAL tOFF PARAMETER MIN Access Time from /RAS Access Time from /CAS Access Time from Column Address Read Command Setup Time Read Command Hold Time to /CAS Read Command Hold Time to /RAS Column Address to /RAS Lead Time Output Buffer Turn-off Time 0 0 0 30 MAX 60 15 30 15 MIN 0 0 0 35 MAX 70 18 35 15 ns ns ns ns ns ns ns ns 7 6 6 2,3 3,4 3,5,14 HMD1M32M2G-7 UNIT NOTE
Write Cycle HMD1M32M2G-6 SYMBOL twcs PARAMETER MIN Write Command Setup Time 0 MAX MIN 0 MAX ns 11 HMD1M32M2G-7 UNIT NOTE
URL:www.hbe.co.kr REV. 1.0 (August. 2002)
-5-
HANBiT Electronics Co., Ltd.
HANBit
tWCH tWP tRWL tCWL tDS tDH Write Command Hold Time Write Command Pulse Width Write Command to /RAS Lead Time Write Command to /CAS Lead Time Data-in Setup Time Data-in Hold Time 10 10 15 15 0 10 15 10 18 18 0 15
HMD1M32M2EG
ns ns ns ns ns ns 12 12
REFRESH CYCLE HMD1M32M2G-6 SYMBOL PARAMETER MIN /CAS Setup Time tCRS (/CAS-before-/RAS Refresh Cycle) /CAS Hold Time tCHR (/CAS-before-/RAS Refresh Cycle) tRPC /RAS Precharge to /CAS Hold Time 5 5 ns 10 10 ns 10 10 ns MAX MIN MAX HMD1M32M2G-7 UNIT NOTE
EDO MODE CYCLE HMD1M32M2G-6 SYMBOL tPC tCP tRASP tACP PARAMETER MIN EDO Mode Cycle Time EDO Mode /RAS Precharge Time EDO Mode /CAS Pulse Time Access Time from /CAS Precharge 40 10 60 MAX 100K 35 MIN 45 10 70 MAX 100K 40 ns ns ns ns 13 14 HMD1M32M2G-7 UNIT NOTE
/RAS Hold Time from /CAS Precharge 35 40 ns tRHCP Note: 1. AC measurements assume tT = 5ns. 2. Assumes that tRCD<=tRCD(max) and tRCD<=tRCD(max). If tRCD or tRCD is greater than the maximum recommended value shown in this table, tRCD exceeds the value shown. 3. Measured with a load circuit equivalent to 2TTL loads and 100PpF. 4. Assumes that tRCD >= tRCD (max) and tRCD<= tRCD (max). 5.Assumes that tRCD <= tRCD (max) and tRCD>= tRCD (max). 6.Either tRCH or tRRH must be satisfied for a read cycles. 7. tOFF(max) defines the time at which the outputs achieve the open circuit condition and is not referenced to output voltage levels. 8. VIH(min) and VIL(max) are reference levels for measuring timing of input signals. Also, transition times are measured between VIH and VIL. 9. Operation with the tRCD (max) limit insures that tRAC (max) can be met, tRCD (max) is specified as a reference point only, if tRCD is greater than the specified tRCD (max) limit, then access time is controlled exclusively by tCAC . 10. Operation with the tRAD (max) limit insures that tRAC (max) can be met, tRAD (max) is specified as a reference point only, if tRAD is greater than the specified tRAD (max) limit, then access time is controlled exclusively by tAA. 11. TWCS is not restrictive operating parameter. It is included in the data sheet as electrical characteristics only. If twcs >= twcs (min), the cycle is an early write cycle and the data out pin will remain open circuit(high impedance) throughout the entire cycle. 12. These parameters are referenced to /CAS leading edge in early write cycles. 13. tRASP is defines /RAS pulse width in EDO Mode cycles. 14. Access time is determined by the longer of tAA or tCAC or tACP .
URL:www.hbe.co.kr REV. 1.0 (August. 2002)
-6-
HANBiT Electronics Co., Ltd.
HANBit
HMD1M32M2EG
15. An initial pause of 200us is required after power up followed by a minimum of eight initialization cycle (eny combination of cycles containing /RAS clock such as /RAS only refresh). If the internal refresh count is used, a mnimum of eight /CAS before /RAS refresh cycle are required.
Packaging Dimension
107.95 mm 101.19 mm 3.38 mm R1.57 mm 3.18 0.51R
19.05mm 10.16 mm 6.35 mm 2.03mm 6.35mm Gold : 1.0410 mm 6.35 mm 95.25 mm 5.08mm MAX R1.571.0 mm
0.25 mm MAX
2.54 mm MIN
Gold : 1.040.10 mm 1.27mm Solder:0.9140.10mm 1.290.08 mm
ORDERING INFORMATION
Part Number Density Org. Package Component Number 2EA 2EA Vcc MODE SPEED
HMD1M32M2EG-6 HMD1M32M2EG-7
4MByte 4MByte
X32 x 32
72 Pin-SIMM 72 Pin-SIMM
5V 5V
EDO EDO
60ns 70ns
URL:www.hbe.co.kr REV. 1.0 (August. 2002)
-7-
HANBiT Electronics Co., Ltd.

▲Up To Search▲

Price & Availability of HMD1M32M2EG

	To Download HMD1M32M2EG Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .